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  vishay siliconix dg508b, dg509b document number: 64821 s10-2817-rev. d, 20-dec-10 www.vishay.com 1 precision 8-channel/dual 4-channel cmos analog multiplexers features ? operate with single or dual power supply ? v+ to v- analog signal swing range ? 44 v power supply maximum rating ? extended operate temperature range: - 40 c to + 125 c ? low leakage typically < 3 pa ? low charge injection - q inj = 2 pc ? low power - i supply : 10 a ? ttl compatible logic ? > 250 ma latch up current per jesd78 ? available in soic16, tssop16, pdip, and miniqfn16 packages ? superior alternative to: - adg508a, dg508a, hi-508 - adg509a, dg509a, hi-509 ? compliant to rohs directive 2002/95/ec ? halogen-free according to iec 61249-2-21 definition benefits ? reduced switching errors ? reduced glitching ? improved data throughput ? reduced power consumption ? increased ruggedness ? wide supply ranges ( 5 v to 20 v) applications ? data acquisition systems ? audio and video signal routing ? ate systems ? medical instrumentation description the dg508b is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (a0, a1, a2). the dg509b is a dual 4-channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2-bit binary address (a0, a1). break-before-make switching action protects against mo mentary crosstalk between adjacent channels. an on channel conducts current equally well in both directions. in the off state each channel blocks voltages up to the power supply rails. an enable (en) function allows the user to reset the multiplexer/dem ultiplexer to all switches off for stacking several devices. all control inputs, addresses (ax) and enable (en) are tt l compatible over the full specified operating temperature range. the dg508b and dg509b are fabricated on an enhanced sg-ii cmos process that achieves improved performance on: reduced charge injection, lower device leakage, and minimized parasitic capacitance. as the dg508, dg509 has a long history in the industry with many suppliers offering copies - and in some cases improved variations - with the best in class improvements, the vishay siliconix new version of the dg508b, dg509b are the superior alternatives to what is currently available. applications for the dg508b, dg509b include high speed and high precision data acquisi tion, audio signal switching and routing, ate systems, and avionics. high performance and low power dissipation make them ideal for battery operated and remote instrumentation applications. the dg508b and dg509b have the absolute maximum voltage rating extended to 44 v. additionally, single supply operation is also allowed. an epitaxial layer prevents latch-up. the dg508b and dg509b are both available in 16-lead soic, tssop, pdip, and miniqfn (1.8 mm x 2.6 mm) package options with extended temperature range of - 40 c to + 125 c. for more information, refer to vishay siliconix dg508b, dg509b evaluation board note. functional block diagram and pin configuration s 3 a 0 s 6 d s 4 a 1 s 8 s 7 en dual-in-line soic and tssop a 2 v- gnd s 1 v+ s 2 s 5 decoders/drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 to p v i ew 89 dg508b dual-in-line soic and tssop 9 a 0 d a a 1 d b en gnd v- v+ s 1a s 1b s 2a s 2b s 3a s 3b s 4a s 4b decoders/drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 top view 8 dg509b
www.vishay.com 2 document number: 64821 s10-2817-rev. d, 20-dec-10 vishay siliconix dg508b, dg509b functional block diagram and pin configuration truth tables and ordering information logic ?0? = v il ?? 0.8 v logic ?1? = v ih ?? 2.0 v x = do not care notes: a. - 40 c to 85 c datasheet limits apply. miniqfn-16l top v ie w device markin g : 6xx traceability code: 6 is dg50 8 ben xx = date/lot dg50 8 b miniqfn-16l dg509b top v ie w device markin g : 7xx traceability code: 7 is dg509ben xx = date/lot pin 1: lo n g lead 13 14 15 16 8 7 6 5 12 3 4 12 11 10 9 6xx decoders/ dri v ers v - s 1 s 2 s 3 s 4 s 7 s 8 d a2 a1 a0 e n s 5 s 6 v + g n d pin 1: lo n g lead 13 14 15 16 8 7 6 5 12 3 4 12 11 10 9 7xx decoders/ dri v ers v - s 1a s 2a s 3a s 4a s 4b d b g n d a1 a0 e n s 2b s 3b v + d a s 1b truth table (dg508b) a 2 a 1 a 0 en on switch x x x 0 none 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 truth table (dg509b) a 1 a 0 en on switch x x 0 none 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 ordering information (dg508b) temp. range package part number - 40 c to 125 c a 16-pin soic dg508bey-t1-e3 16-pin tssop dg508beq-t1-e3 16-pin pdip dg508bej-e3 16-pin miniqfn DG508BEN-T1-GE4 ordering information (dg509b) temp. range package part number - 40 c to 125 c a 16-pin soic dg509bey-t1-e3 16-pin tssop dg509beq-t1-e3 16-pin pdip dg509bej-e3 16-pin miniqfn dg509ben-t1-ge4
document number: 64821 s10-2817-rev. d, 20-dec-10 www.vishay.com 3 vishay siliconix dg508b, dg509b notes: a. signals on s x , d x or in x exceeding v+ or v- will be clamped by internal diodes . limit forward diode current to maximum current ratings. b. all leads soldered or welded to pc board. c. derate 8.0 mw/c above 70 c. d. derate 5.6 mw/c above 70 c. e. derate 6.3 mw/c above 70 c. f. derate 6.6 mw/c above 70 c. absolute maximum ratings parameter limit unit voltages referenced to v- v+ 44 v gnd 25 digital inputs a , v s , v d (v-) - 2 to (v+) + 2 or 20 ma, whichever occurs first current (any terminal) 30 ma peak current, s or d (pulsed at 1 ms, 10 % duty cycle max.) 100 storage temperature (ey, eq, ej, en suffix) - 65 to 150 c power dissipation (packages) b 16-pin narrow soic c 600 mw 16-pin tssop d 450 16-pin pdip e 510 16-pin miniqfn f 525 thermal resistance ( ? j-a ) b 16-pin narrow soic c 125 c/w 16-pin tssop d 178 16-pin pdip e 159.6 16-pin miniqfn f 152 specifications parameter symbol test conditions unless otherwise specified v+ = 15 v, v- = - 15 v ( 10 %) v ax , v en = 2.0 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - 15 15 - 15 15 v drain-source on-resistance r ds(on) v d = 10 v, i s = - 1 ma room 180 380 380 ? full 480 450 r ds(on) matching ? r ds(on) v d = 10 v room 10 source off leakage current i s(off) v d = 10 v v s = 10 v v en = 0 v room - 1 1 - 1 1 na full - 50 50 - 50 50 drain off leakage current i d(off) dg508b room - 1 1 - 1 1 full - 100 100 - 100 100 dg509b room - 1 1 - 1 1 full - 50 50 - 50 50 drain on leakage current i d(on) v s = v d = 10 sequence each switch on dg508b room - 1 1 - 1 1 full - 100 100 - 100 100 dg509b room - 1 1 - 1 1 full - 50 50 - 50 50 digital control logic high input voltage v inh full 2.0 2.0 v logic low input voltage v inl full 0.8 0.8 logic high input current i ih v ax , v en = 2.0 v full - 1 1 - 1 1 a logic low input current i il v ax , v en = 0.8 v full - 1 1 - 1 1 logic input capacitance e c in f = 1 mhz room 4 pf
www.vishay.com 4 document number: 64821 s10-2817-rev. d, 20-dec-10 vishay siliconix dg508b, dg509b specifications parameter symbol test conditions unless otherwise specified v+ = 15 v, v- = - 15 v ( 10 %) v ax , v en = 2.0 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d dynamic characteristics transition time t trans vs 1 = + 10 v/- 10 v, vs 8 = - 10 v/+ 10 v, r l = 1 m ? , c l = 35 pf room 145 300 300 ns full 400 400 break-before-make interval t open vs 1 = vs 8 = 5.0 v, c l = 35 pf, r l = 1 k ? room 37 15 15 full 1 1 enable turn-on time t on(en) vs 1 = 5 v, vs 2 to vs 8 = 0 v, r l = 1 k ? , c l = 35 pf room 100 250 250 full 340 340 enable turn-off time t off(en) room 90 240 240 full 300 300 charge injection e q inj c l = 1 nf, r gen = 0 ? , v gen = 0 v full 2 pc off isolation e oirr c l = 5 pf , r l = 50 ??? f = 1 mhz room - 81 db crosstalk e xtalk room - 88 - 3 db bandwidth e bw r l = 50 ? room 250 mhz total harmonic distortion e thd r l = 10 k ? , 5 v rms f = 20 hz to 20 khz room 0.04 % source off capacitance e c s(off) f = 1 mhz room 3 pf drain off capacitance e c d(off) dg508b room 13 dg509b room 8 drain on capacitance e c d(on) dg508b room 18 dg509b room 11 power supply positive supply current i+ v ax , v en = 0 v or v+ room 0.01 0.5 0.5 ma full 0.6 0.6 negative supply current i- full - 200 - 200 a specifications (single supply 12 v) parameter symbol test conditions unless otherwise specified v+ = 12 v, v- = 0 v ( 10 %) v ax , v en = 2.0 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full 0120 12v on-resistance r ds(on) v d = 10 v/0 v, i s = 1 ma room 265 500 500 ? full 650 600 r ds(on) matching ? r ds(on) room 10 switch off leakage current i s(off) v+ = 12 v, v- = 0 v v d = 0 v/10 v, v s = 10 v/0 v room - 1 1 - 1 1 na full - 50 - 50 - 50 50 i d(off) dg508b room - 1 1 - 1 1 full - 100 100 - 100 100 i d(off) dg509b room - 1 1 - 1 1 full - 50 50 - 50 50
document number: 64821 s10-2817-rev. d, 20-dec-10 www.vishay.com 5 vishay siliconix dg508b, dg509b notes: a. v ax , v en = input voltage perform proper function. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, no t guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this datash eet. e. guaranteed by design, not subject to production test. f. ? r ds(on) = r ds(on) max. - r ds(on) min. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications (single supply 12 v) parameter symbol test conditions unless otherwise specified v+ = 12 v, v- = 0 v ( 10 %) v ax , v en = 2.0 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d analog switch channel on leakage current i d(on) v+ = 12 v, v- = 0 v v s = v d = 0 v/10 v dg508b room - 11- 1 1 na full - 100 100 - 100 100 dg509b room - 11- 1 1 full - 50 50 - 50 50 digital control logic high input voltage v inh full 2.0 2.0 v logic low input voltage v inl full 0.8 0.8 logic high input current i ih v ax , v en = 2.0 v full - 1 1 - 1 1 a logic low input current i il v ax , v en = 0.8 v full - 1 1 - 1 1 logic input capacitance e c in f = 1 mhz room 4 pf dynamic characteristics transition time t trans vs 1 = 10 v/0 v, vs 8 = 0 v/10 v, r l = 1 m ? , c l = 35 pf room 165 400 400 ns full 550 500 break-before-make interval t open vs 1 = vs 8 = 5 v, c l = 35 pf, r l = 1 k ? room 37 15 15 full 1 1 enable turn-on time t on(en) vs 1 = 5 v, vs 2 to vs 8 = 0 v, r l = 1 k ? , c l = 35 pf room 125 300 300 full 550 425 enable turn-off time t off(en) room 75 250 250 full 350 300 charge injection e q inj c l = 1 nf, r gen = 0 ? , v gen = 0 v full 2.5 pc off isolation e oirr c l = 5 pf , r l = 50 ? f = 1 mhz room - 80 db crosstalk e x ta l k room - 88 - 3 db bandwidth e bw r l = 50 ? room 200 mhz total harmonic distortion e thd r l = 10 k ? , 5 v rms , f = 20 hz to 20 khz room 0.26 % source off capacitance e c s(off) f = 1 mhz room 2 pf drain off capacitance e c d(off) dg508b 13 dg509b 8 channel on capacitance e c d(on) dg508b 17 dg509b 12 power supply power supply current i+ v ax , v en = 0 v, or v+ room 0.01 0.5 0.5 ma full 0.6 0.6
www.vishay.com 6 document number: 64821 s10-2817-rev. d, 20-dec-10 vishay siliconix dg508b, dg509b schematic diagram (typical channel) typical characteristics (25 c, unless otherwise noted) figure 1. en a 0 s 1 d s n decode/ drive level shift v- v + v re f a x gnd v- v+ on-resistance vs. v d and single supply voltage on-resistance vs. analog voltage and temperature 100 125 150 175 200 225 250 375 300 325 350 375 400 04 8 12 16 20 24 2 8 32 36 v = + 10. 8 v v = + 12.0 v v = + 20.0 v v = + 36.0 v t = 25 c i s = 1 ma r o n - on-resistance ( ) v d - analog v oltage ( v ) r o n - on-resistance ( ) v - analog v oltage ( v ) 100 150 200 250 300 350 400 450 500 550 01234567 8 9101112 + 125 c + 8 5 c + 25 c - 40 c v = + 10. 8 v i s = 1 ma on-resistance vs. v d and dual supply voltage on-resistance vs. analog voltage and temperature r o n - on-resistance ( ) v d - analog v oltage ( v ) 50 100 150 200 250 300 350 400 - 20 - 16 - 12 - 8 - 4 0 4 8 12 16 20 v = 5.0 v v = 10. 8 v v = 13.5 v v = 15 v v = 20 v t = 25 c i s = 1 ma r o n - on-resistance ( ) v - analog v oltage ( v ) 100 150 200 250 300 350 400 450 500 01234567 8 9101112 + 125 c + 8 5 c + 25 c - 40 c v = + 12 v i s = 1 ma
document number: 64821 s10-2817-rev. d, 20-dec-10 www.vishay.com 7 vishay siliconix dg508b, dg509b typical characteristics (25 c, unless otherwise noted) on-resistance vs. analog voltage and temperature on-resistance vs. analog voltage and temperature on-resistance vs. analog voltage and temperature r o n - on-resistance ( ) v - analog v oltage ( v ) 50 100 150 200 250 300 350 400 0246 8 10 12 14 16 1 8 20 + 125 c + 8 5 c + 25 c - 40 c v = + 20 v i s = 1 ma r o n - on-resistance ( ) v - analog v oltage ( v ) 100 650 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 150 200 250 300 350 400 450 500 550 600 v = 5 v i s = 1 ma + 125 c + 8 5 c + 25 c - 40 c r o n - on-resistance ( ) v - analog v oltage ( v ) 50 350 - 14 - 10 - 6 - 2 2 6 10 14 100 150 200 250 300 v = 13.5 v i s = 1 ma + 125 c + 8 5 c + 25 c - 40 c on-resistance vs. analog voltage and temperature on-resistance vs. analog voltage and temperature on-resistance vs. analog voltage and temperature r o n - on-resistance ( ) v - analog v oltage ( v ) 50 100 150 200 250 300 04 8 12 16 20 24 2 8 32 36 + 125 c + 8 5 c + 25 c - 40 c v = + 36 v i s = 1 ma r o n - on-resistance ( ) v - analog v oltage ( v ) 50 400 - 11 - 9 - 7 - 5 - 3 - 1 1 3 5 7 9 11 100 150 200 250 300 350 v = 10. 8 v i s = 1 ma + 125 c + 8 5 c + 25 c - 40 c r o n - on-resistance ( ) v - analog v oltage ( v ) 50 350 - 15 - 9 - 3 3 9 15 100 150 200 250 300 v = 15.0 v i s = 1 ma + 125 c + 8 5 c + 25 c - 40 c
www.vishay.com 8 document number: 64821 s10-2817-rev. d, 20-dec-10 vishay siliconix dg508b, dg509b typical characteristics (25 c, unless otherwise noted) on-resistance vs. analog voltage and temperature thd vs. frequency insertion loss, off-isolatio n, crosstalk vs. frequency 50 100 150 200 250 300 350 - 20 - 16 - 12 - 8 - 4 0 4 8 12 16 20 + 125 c + 85 c + 25 c - 40 c r on - on-resistance ( ? ) v - analog voltage (v) v = 20 v i s = 1 ma 0 0.01 0.1 1 10 10 100 1000 10 000 100 000 frequency (hz) thd (%) r l = 10 k ? v signal = 5 v rms v = + 12 v v = 15 v - 100 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 10 frequency (hz) 100k loss, oirr, x talk (db) loss oirr x talk v+ = 12 v r l = 50 ? 1m 10m 100m 200m switching threshold vs. supply voltage insertion loss, off-isolation, crosstalk vs. frequency supply current vs. input switching frequency 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 5 6 7 8 9 1011121314151617181920 supply voltage (v) v t - switching threshold (v) v ih v il - 100 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 10 frequency (hz) 100k 1m 10m 100m 300m loss, oirr, x talk (db) loss x talk v = 15 v r l = 50 ? oirr i+ - supply current (a) v = 15.0 v v = + 12.0 v input switching frequency (hz) 10 100 1k 10k 100k 1m 10m 100 ma 10 ma 1 ma 100 a 10 a 1 a
document number: 64821 s10-2817-rev. d, 20-dec-10 www.vishay.com 9 vishay siliconix dg508b, dg509b typical characteristics (25 c, unless otherwise noted) supply current vs. input switching frequency leakage current vs. temperature input switching frequency (hz) i- - supply current (a) 10 100 1k 10k 100k 1m 10m 100 ma 10 ma 1 ma 100 a 10 a 1 a 100 na 10 na 1 na v = + 12.0 v v = 15.0 v - 60 - 40 - 20 0 20 40 60 80 100 120 140 temperature (oc) leakage current (pa) 10 -1 10 0 10 1 10 2 10 3 10 4 10 5 v = 15.0 v i d(on) i s(off) i d(off) charge injection vs. analog voltage leakage current vs. analog voltage q i n j - charge injection (pf) v s - analog v oltage ( v ) - 12 - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 12 - 15 - 12 - 9 - 6 - 3 0 3 6 9 12 15 v = 15 v c l = 1 nf v = + 12 v c l = 1 nf - 15 - 10 - 5 0 5 10 15 analog voltage (v) leakage current (pa) 8 6 4 2 0 - 2 - 4 - 6 - 8 i d(on) i d(off) i s(off) v = 15 v t = 25 c
www.vishay.com 10 document number: 64821 s10-2817-rev. d, 20-dec-10 vishay siliconix dg508b, dg509b test circuits figure 2. transition time a 1 a 0 a 2 a 1 a 0 + 15 v - 15 v en v+ v- gnd d 35 pf v o s 1 s 2 - s 7 s 8 1 m ? 10 v 10 v + 15 v - 15 v en v+ v- gnd 35 pf v o s 1b s 1a - s 4a , d a s 4b 1 m ? 10 v 10 v d b logic input switch output v s8 v o t tr a n s t r < 20 ns t f < 20 ns s 8 on s 1 on t tr a n s 0 v v s1 50 % 90 % 90 % 3 v 0 v dg508b dg509b 50 ? + 2.0 v 50 ? + 2.0 v figure 3. enable switching time logic input switch output v o t r < 20 ns t f < 20 ns 3 v 0 v 0 v t off(e n ) t on (e n ) 50 % 90 % 10 % v o en s 1 s 2 - s 8 a 0 a 1 a 2 50 ? 1 k ? v o v+ gnd v- d 5 v 35 pf - 15 v + 15 v s 1b s 1a - s 4a , d a s 2b - s 4b d b en a 0 a 1 50 ? 1 k ? v o v+ gnd v- 5 v 35 pf - 15 v + 15 v dg508b dg509b
document number: 64821 s10-2817-rev. d, 20-dec-10 www.vishay.com 11 vishay siliconix dg508b, dg509b test circuits figure 4. break-before-make interval 50 % 80 % logic input switch output v o v o t o pen t r < 20 ns t f < 20 ns 0 v 3 v 0 v en v+ gnd v- + 5 v 35 pf - 15 v + 15 v + 2.4 v a 2 d b , d all s and d a 1 k ? v o 50 ? a 1 a 0 dg508b dg509b figure 5. charge injection a 0 en a 1 a 2 v o v+ gnd v- d - 15 v + 15 v r g s x c l 1 nf channel select 3 v 0 v off on logic input switch output ? v o ? v o is the measured voltage due to charge transfer error q, when the channel turns of f . q inj = c l x ? v o off figure 6. off isolation r l 50 ? v o v+ gnd v- - 15 v + 15 v a 2 d a 1 a 0 s 8 s x v s en r g = 50 ?? of f isolation = 20 log v ou t v in v in figure 7. crosstalk r l 50 ? v o v+ gnd v- - 15 v + 15 v a 2 d a 1 a 0 s 8 s x v s en r g = 50 ? crosstalk = 20 log v ou t v in v in s 1
www.vishay.com 12 document number: 64821 s10-2817-rev. d, 20-dec-10 vishay siliconix dg508b, dg509b test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?64821 . figure 8. insertion loss r l 50 ? a 2 v o d r g = 50 ? insertion loss = 20 log v ou t a 1 v in a 0 v s s 1 v+ gnd v- - 15 v + 15 v en figure 9. source drain capacitance f = 1 mhz s 1 d en + 15 v - 15 v gnd v+ v- meter hp4192a impedance analyzer or equivalent s 8 a 1 a 2 a 0 channel select
all leads 0.101 mm 0.004 in e h c d e b a1 l  4 3 12 8 7 56 13 14 16 15 9 10 12 11 package information vishay siliconix document number: 71194 02-jul-01 www.vishay.com 1  
  jedec part number: ms-012    dim min max min max a 1.35 1.75 0.053 0.069 a 1 0.10 0.20 0.004 0.008 b 0.38 0.51 0.015 0.020 c 0.18 0.23 0.007 0.009 d 9.80 10.00 0.385 0.393 e 3.80 4.00 0.149 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 l 0.50 0.93 0.020 0.037  0  8  0  8  ecn: s-03946?rev. f, 09-jul-01 dwg: 5300
e 1 e q 1 a l a 1 e 1 b b 1 s c e a d 15 max 12345678 16 15 14 13 12 11 10 9 package information vishay siliconix document number: 71261 06-jul-01 www.vishay.com 1 
  

 
 dim min max min max a 3.81 5.08 0.150 0.200 a 1 0.38 1.27 0.015 0.050 b 0.38 0.51 0.015 0.020 b 1 0.89 1.65 0.035 0.065 c 0.20 0.30 0.008 0.012 d 18.93 21.33 0.745 0.840 e 7.62 8.26 0.300 0.325 e 1 5.59 7.11 0.220 0.280 e 1 2.29 2.79 0.090 0.110 e a 7.37 7.87 0.290 0.310 l 2.79 3.81 0.110 0.150 q 1 1.27 2.03 0.050 0.080 s 0.38 1.52 .015 0.060 ecn: s-03946?rev. d, 09-jul-01 dwg: 5482
vishay siliconix package information document number: 74323 14-aug-06 www.vishay.com 1 mini qfn-16l dim millimeters inches min. nam max. min. nam max. a 0.70 0.75 0.80 0.0275 0.0295 0.0315 a1 0 - 0.05 0 - 0.002 b 0.15 0.20 0.25 0.0059 0.0078 0.0098 c 0.15 0.20 0.25 0.0059 0.0078 0.0098 d 2.60 bsc 0.1023 bsc e 1.80 bsc 0.0708 bsc e 0.40 bsc 0.0157 bsc l 0.35 0.40 0.45 0.0137 0.0157 0.0177 l1 0.45 0.50 0.55 0.0177 0.0196 0.0216 ecn t-06380-rev. a, 14-aug-06 dwg: 5954 back side v ie w d e (2) (1) (16) (15) (14) (13) a c b e l a1 (4) (3) (5) (6) (7) ( 8 ) (9) (12) (11) (10) (10) (9) (12) (11) (3) (2) (1) (4) (16) (15) (14) (13) (5) (6) (7) ( 8 ) l1
vishay siliconix package information document number: 74417 23-oct-06 www.vishay.com 1 symbols dimensions in millimeters min nom max a - 1.10 1.20 a1 0.05 0.10 0.15 a2 - 1.00 1.05 b 0.22 0.28 0.38 c - 0.127 - d 4.90 5.00 5.10 e 6.10 6.40 6.70 e1 4.30 4.40 4.50 e-0.65- l 0.50 0.60 0.70 l1 0.90 1.00 1.10 y--0.10 1036 ecn: s-61920-rev. d, 23-oct-06 dwg: 5624 tssop: 16-lead
application note 826 vishay siliconix www.vishay.com document number: 72608 24 revision: 21-jan-08 application note recommended minimum pads for so-16 recommended minimum pads for so-16 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.152 (3.861) 0.047 (1.194) 0.028 (0.711) 0.050 (1.270) 0.022 (0.559) 0.372 (9.449) return to index return to index
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.


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